Pinghui Li
16Patents
3h-index
28Co-inventors
52Inventor score
Filing activity: Nov 25, 2015 → Nov 5, 2021
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US9583499B1 | Devices with embedded non-volatile memory and metal gates and methods for fabricating the same | Electricity | 15 | Active |
| US10211336B2 | LDMOS transistor structures and integrated circuits including LDMOS transistor structures | Electricity | 3 | Active |
| US9780231B1 | Integrated circuits with flash memory and methods for producing the same | Electricity | 3 | Active |
| US9793394B1 | Integrated circuits including LDMOS transistor structures and methods for fabricating LDMOS transistor structures | Electricity | 3 | Active |
| US9825185B1 | Integrated circuits and methods for fabricating integrated circuits with non-volatile memory structures | Electricity | 2 | Active |
| US9698200B2 | Magnetism-controllable dummy structures in memory device | Electricity | 2 | Active |
| US10109638B1 | Embedded non-volatile memory (NVM) on fully depleted silicon-on-insulator (FD-SOI) substrate | Electricity | 1 | Active |
| US10381360B1 | Control gate dummy for word line uniformity and method for producing the same | Electricity | 1 | Active |
| US10741552B2 | Method and device for embedding flash memory and logic integration in FinFET technology | Electricity | 0 | Active |
| US10163901B1 | Method and device for embedding flash memory and logic integration in FinFET technology | Electricity | 0 | Active |
| US11545570B2 | High-voltage devices integrated on semiconductor-on-insulator substrate | Electricity | 0 | Active |
| US10978510B2 | Memory device with density-controllable dummy fill strategy for near-MRAM periphery and far-outside-MRAM logic regions for embedded MRAM technology | Electricity | 0 | Active |
| US10374005B2 | Density-controllable dummy fill strategy for near-MRAM periphery and far-outside-MRAM logic regions for embedded MRAM technology and method for producing the same | Electricity | 0 | Active |
| US9929165B1 | Method for producing integrated circuit memory cells with less dedicated lithographic steps | Electricity | 0 | Active |
| US12124787B2 | System and method for automatic generation of device-based design rules and corresponding design rule checking (DRC) codes | Physics | 0 | Active |
| US10411027B2 | Integrated circuits with memory cells and method for producing the same | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.