Semiconductor memory
US10381374B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 5, 2018 |
| Grant date | Aug 13, 2019 |
| Priority date | — |
| Expiry date | Mar 5, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/1434
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
According to one embodiment, a semiconductor memory device includes a first memory chip, a circuit chip, and an external connection electrode on a surface of the first memory chip. The first memory chip comprises first conductors stacked via an insulator, and a first pillar passing the first conductors. The circuit chip comprises a substrate, a control circuit, and a second conductor connected to the control circuit, the circuit chip being attached to the first memory chip. The external connection electrode comprises a portion extending from a side of the surface of the first memory chip through the first memory chip and connected to the second conductor. Part of the first conductors is between the external connection electrode and the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.