Memory cell and non-volatile semiconductor storage device
US10381446B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 27, 2016 |
| Grant date | Aug 13, 2019 |
| Priority date | — |
| Expiry date | Jun 4, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/0413
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory cell and a non-volatile semiconductor memory device are disclosed. Nitride sidewall layers are respectively disposed in a first sidewall spacer and a second sidewall spacer, to separate a memory gate electrode and a first select gate electrode from each other and the memory gate electrode and a second select gate electrode from each other. Hence, a breakdown voltage is improved around the memory gate electrode as compared with a conventional case in which the first sidewall spacer and the second sidewall spacer are simply made of insulating oxide films. The nitride sidewall layers are disposed farther from a memory well than a charge storage layer. Hence, charge is unlikely to be injected into the nitride sidewall layers at charge injection from the memory well into the charge storage layer, thereby preventing an operation failure due to charge storage in a region other than the charge storage layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.