Floating-shield triple-gate MOSFET

US10388783B2 · kind B2 · utility

Assignee

• Polar Semiconductor, LLC · US

Inventor

• Don Rankila · Farmington, US

Key dates

• Filing date: Feb 17, 2016
• Grant date: Aug 20, 2019
• Expiry date: Apr 22, 2036

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/256

Abstract

Apparatus and associate methods relate to a high-voltage MOSFET bounded by two trenches, each having dielectric sidewalls and a dielectric bottom isolating a top field plate and a bottom field plate. The top field plate is electrically connected to a biasing circuit net, and the bottom field plate is biased via a capacitive coupling to the top field plate. The upper field plate and lower field plate are configured to deplete the majority carriers in a drain region of the MOSFET bounded by the two trenches so as to equalize two local maxima of an electric field induced by a drain/body bias, the two local maxima located proximate a drain/body metallurgical junction and proximate a trench bottom. The two local maxima of the electric field are equalized by controlling a depth location of an intervening dielectric between the upper field plate and the lower field plate.