Virtual impedance auto matching method
US10395897B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 13, 2019 |
| Grant date | Aug 27, 2019 |
| Priority date | — |
| Expiry date | Mar 13, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01J2237/334
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A virtual impedance auto matching method includes (a) deciding an input parameter of an RF generator and a load condition parameter of a plasma chamber, (b) applying an RF ON signal to an impedance matcher, (c) determining whether initial preset positions of a load vacuum variable capacitor and a tuning vacuum variable capacitor constituting the impedance matcher are within a matching range, (d) applying the RF OFF signal to the impedance matcher and generating an alarm signal indicating deviation from the matching range, when step (c) is not satisfied, (e) starting matching by operating the impedance matcher when step (c) is satisfied, and (f) deciding the initial preset positions of the load vacuum variable capacitor and the tuning vacuum variable capacitor by analyzing a magnitude error and a phase error with respect to 50+j0 according to an impedance change, when the matching is completed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.