Temperature compensation for reference voltages in an analog-to-digital converter
US10396811B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 15, 2019 |
| Grant date | Aug 27, 2019 |
| Priority date | — |
| Expiry date | Jan 15, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/466
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Circuits for a successive approximation register analog-to-digital converter and related methods. A global reference circuit includes a first super source follower (SSF) circuit having an input coupled to an output of a first current mirror and to a first adjustment circuit, and an operational amplifier having an input coupled to an output of the first SSF circuit and an output coupled to an input of the first current mirror. Local slices each include a second current mirror having an input coupled to the output of the operational amplifier, a second super source follower (SSF) circuit having an input coupled to an output of the second current mirror and to a second adjustment circuit. The first and second adjustment circuits may be configured to adjust a voltage at the input of the first SSF circuit and respective voltages at the input of the second SSF circuit of each local slice.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.