Semiconductor memory device and method for manufacturing the same
US10403636B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 13, 2016 |
| Grant date | Sep 3, 2019 |
| Priority date | — |
| Expiry date | Dec 30, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/50
Abstract
A semiconductor memory device according to the embodiment includes a substrate, electrodes, at least one pillar structure, at least one charge storage film, and at least one insulating member. The electrodes are provided on the substrate, are separately stacked each other, and constitute a stacked body. The electrodes have a first width in a first direction along a surface of the substrate and include a portion extending in a second direction crossing the first direction along the surface. The pillar structure is provided in the stacked body and includes a semiconductor layer extending in a stacking direction of the stacked body. The charge storage film is provided between the semiconductor layer and the electrodes. The insulating member has a width in the first direction smaller than the first width, pierces the electrodes, and is provided to extend in the stacking direction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.