Method of manufacturing semiconductor device
US10403749B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 31, 2019 |
| Grant date | Sep 3, 2019 |
| Priority date | — |
| Expiry date | Jan 31, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/62
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In a first main surface side of a silicon carbide semiconductor base, a trench is formed. A second base region of a second conductivity type is arranged at a position facing the trench in a depth direction. An end (toward a drain electrode) of the second base region of the second conductivity type, and an end (toward the drain electrode) of a first base region of the second conductivity type reach a position deeper than an end (toward the drain electrode) of a region of a first conductivity type. Thus, the electric field at a gate insulating film at the trench bottom is mitigated, suppressing the breakdown voltage of the active region and enabling breakdown voltage design of the edge termination region to be facilitated. Further, such a semiconductor device may be formed by an easy method of manufacturing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.