Semiconductor device
US10411088B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 12, 2018 |
| Grant date | Sep 10, 2019 |
| Priority date | — |
| Expiry date | Apr 12, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0151
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device including a substrate and a shallow trench isolation (STI) structure is provided. The substrate has a first voltage area and a second voltage area. A top surface of the substrate in the second voltage area is higher than a top surface of the substrate in the first voltage area, and a trench is defined in the substrate in between the first and second voltage area. The STI structure is located in the substrate within the trench, wherein a first portion of the STI structure is located in the first voltage area, a second portion of the STI structure is located in the second voltage area, and a step height difference exist in between a bottom surface of the first portion of the STI structure in the first voltage area and a bottom surface of the second portion of the STI structure in the second voltage area.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.