Semiconductor device and circuit protecting method
US10411681B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 5, 2018 |
| Grant date | Sep 10, 2019 |
| Priority date | — |
| Expiry date | Jan 5, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/84
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A device includes a first transistor having a first source terminal, a first drain terminal, and a first gate terminal; and a second transistor having a second source terminal, a second drain terminal, and a second gate terminal. The second source terminal is coupled to the first gate terminal and the first source terminal is coupled to the second gate terminal. The first transistor has a first threshold voltage, and the second transistor has a second threshold voltage different from the first threshold voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.