Ultra-low power driver of reference voltage
US10411688B1 · kind B1 · utility
0Cited by
2References
3Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 24, 2018 |
| Grant date | Sep 10, 2019 |
| Priority date | — |
| Expiry date | Jun 24, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K2217/0036
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
A method and apparatus for implementing a CMOS buffer for driving a reference voltage that consumes very low current in normal operating conditions but drive high current when output voltage is off, tracking the required reference voltage. The circuit is operating in a “deadzone” most of the time, where pull-up and pull-down current paths are blocked, and ultra-low power comparators, with build-in offset, are monitoring the output voltage continuously, and driving compensation current, when needed. The circuit can be manufactured with a standard CMOS processing technology.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.