PLSense Ltd.
8Patents
8Active
8Granted
43Portfolio score
Filing activity: Oct 9, 2014 → Jun 24, 2018
Most-cited patents
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US9882564B1 | In line critical path delay measurement for accurate timing indication for a first fail mechanism | Electricity | 2 | Active |
| US9935636B1 | CMOS input buffer with low supply current and voltage down shifting | Electricity | 2 | Active |
| US10120967B2 | Methods and apparatuses for SW programmable adaptive bias control for speed and yield improvement in the near/sub-threshold domain | Electricity | 1 | Active |
| US9531385B2 | Methods and apparatuses for multiple concurrent sub-threshold voltage domains for optimal power per given performance | Electricity | 0 | Active |
| US9935542B2 | Methods and apparatuses for adaptive dynamic voltage control for optimizing energy per operation per a given target speed | Emerging Cross-Sectional Technologies | 0 | Active |
| US10608584B2 | Fast start-up circuit for low power crystal oscillator | Electricity | 0 | Active |
| US9768775B2 | Methods and apparatuses for sub-threhold clock tree design for optimal power | Electricity | 0 | Active |
| US10411688B1 | Ultra-low power driver of reference voltage | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Counts and citation impact are objective bibliographic measures.