Substrate, method of sawing substrate, and semiconductor device
US10418335B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 21, 2017 |
| Grant date | Sep 17, 2019 |
| Priority date | — |
| Expiry date | Dec 21, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/11
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of dividing a substrate includes preparing a substrate including a crystalline semiconductor layer having a scribe lane region and device regions, a dielectric layer on the crystalline semiconductor layer, and a partition structure in physical contact with the dielectric layer and provided on the scribe lane region of the crystalline semiconductor layer, forming an amorphous region in the crystalline semiconductor layer, and performing a grinding process on the crystalline semiconductor layer after the forming of the amorphous region. The amorphous region is formed in the scribe lane region of the crystalline semiconductor layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.