Trench gate MOSFET
US10418442B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 20, 2018 |
| Grant date | Sep 17, 2019 |
| Priority date | — |
| Expiry date | Jul 20, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/143
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Provided is a trench gate MOSFET including a substrate of a first conductivity type, an epitaxial layer of the first conductivity type, a first conductive layer of a second conductivity type, a second conductive layer and an interlayer insulating layer. The epitaxial layer is disposed on the substrate and has at least one trench therein. The first conductive layer is disposed in the lower portion of the trench and in physical contact with the epitaxial layer. The second conductive layer is disposed in the upper portion of the trench. The interlayer insulating layer is disposed between the first conductive layer and the second conductive layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.