Systems and methods for improved continuous time linear equalization (CTLE)
US10419250B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 7, 2018 |
| Grant date | Sep 17, 2019 |
| Priority date | — |
| Expiry date | Mar 7, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L27/01
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A continuous time linear equalization (CTLE) system is provided. The CTLE system includes a first adjustable circuit comprising a first adjustable resistive-capacitive (RC) source degeneration circuit and a first differential amplifier stage circuit. The CTLE system also includes a second adjustable circuit electrically coupled to the first adjustable circuit and configured to adjust a frequency suppression of a data signal received by the CTLE system. The CTLE system is configured to provide a gain-versus-frequency curve for the data signal based on adjustments to the first adjustable circuit, adjustments to the second adjustable circuit, or a combination thereof.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.