Memory system with plural nonvolatile memories having different access sizes, different speeds using address conversion information to access one memory by converting an address to access another memory
US10423536B2 · kind B2 · utility
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21Claims
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Key dates
| Filing date | Mar 10, 2017 |
| Grant date | Sep 24, 2019 |
| Priority date | — |
| Expiry date | Mar 11, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7207
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory system has a first memory to be accessed per first data size, a second memory to be accessed per second data size smaller than the first data size, the second memory being accessible at a higher speed than the first memory; and a third memory to store address conversion information that converts an address for accessing the second memory into an address for accessing the first memory. The first and third memories are non-volatile memories.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.