Chip package and method for forming the same
US10424540B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 3, 2017 |
| Grant date | Sep 24, 2019 |
| Priority date | — |
| Expiry date | Oct 3, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/921
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A chip package including a substrate having an upper surface, a lower surface, and a sidewall surface that is at the edge of the substrate is provided. The substrate includes a sensor device therein and adjacent to the upper surface thereof. The chip package further includes light-shielding layer disposed over the sidewall surface of the substrate and extends along the edge of the substrate to surround the sensor device. The chip package further includes a cover plate disposed over the upper surface of the substrate and a spacer layer disposed between the substrate and the cover plate. A method of forming the chip package is also provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.