Systems and methods for reducing substrate surface disruption during via formation
US10424606B1 · kind B1 · utility
1Cited by
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55Claims
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Key dates
| Filing date | May 7, 2018 |
| Grant date | Sep 24, 2019 |
| Priority date | — |
| Expiry date | May 7, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10H20/0364
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Embodiments are related to systems and methods for forming vias in a substrate, and more particularly to systems and methods for reducing substrate surface disruption during via formation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.