Image sensor with reduced fixed pattern noise
US10424609B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 19, 2017 |
| Grant date | Sep 24, 2019 |
| Priority date | — |
| Expiry date | Sep 14, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F39/8053
Abstract
An image sensor may include a pixel array. The pixel array may include a plurality of sub pixel arrays arranged two-dimensionally. Each of the plurality of sub pixel arrays may include a first pixel block and a second pixel block adjacent to the first pixel block in a row direction. Each of the first and second pixel blocks may include a light reception unit including first to fourth unit pixels arranged in a 2×2 matrix structure and a driving circuit. The driving circuit of the first pixel block may be positioned at an upper side of the light reception unit of the first pixel block, and the driving circuit of the second pixel block may be positioned at a lower side of the light reception unit of the first pixel block. The upper side of the first pixel block and an upper side of the second pixel block may be aligned with each other in the row direction, and a lower side of the first pixel block and the lower side of the second pixel block may be aligned with each other in the row direction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.