Patent · US Active

Semiconductor device

US10424638B2 · kind B2 · utility

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12Claims
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Key dates

Filing dateMar 9, 2018
Grant dateSep 24, 2019
Priority date
Expiry dateApr 24, 2038

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10K85/221
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A semiconductor device includes a gate electrode, an insulating layer, a first carbon nanotube, a second carbon nanotube, a P-type semiconductor layer, an N-type semiconductor layer, a conductive film, a first electrode, a second electrode and a third electrode. The insulating layer is located on a surface of the gate electrode. The first carbon nanotube and the second carbon nanotube are located on a surface of the insulating layer. The P-type semiconductor layer and the N-type semiconductor layer are located on the surface of the insulating layer and apart from each other. The conductive film is located on surfaces of the P-type semiconductor layer and the N-type semiconductor layer. The first electrode is electrically connected with the first carbon nanotube. The second electrode is electrically connected with the second carbon nanotube. The third electrode is electrically connected with the conductive film.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.