Patent · US Active

Non-volatile cache and non-volatile storage medium using single bit and multi bit flash memory cells or different programming parameters

US10430328B2 · kind B2 · utility

11Cited by
2References
19Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 16, 2014
Grant dateOct 1, 2019
Priority date
Expiry dateNov 6, 2034

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG11C2211/5641
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Systems and methods for configuring, controlling and operating a non-volatile cache are disclosed. A host system may poll a memory system as to the memory system's configuration of its non-volatile cache. Further, the host system may configure the non-volatile cache on the memory system, such as the size of the non-volatile cache and the type of programming for the non-volatile cache (e.g., whether the non-volatile cache is programmed according to SLC or the type of TRIM used to program cells in the non-volatile cache). Moreover, responsive to a command from the host to size the non-volatile cache, the memory system may over or under provision the cache. Further, the host may control operation of the non-volatile cache, such as by sending selective flush commands.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.