Static random access memory and method of controlling the same
US10431295B2 · kind B2 · utility
2Cited by
13References
20Claims
0Family size
Assignee
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Key dates
| Filing date | May 30, 2014 |
| Grant date | Oct 1, 2019 |
| Priority date | — |
| Expiry date | May 30, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/419
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A static random access memory (SRAM) that includes a memory cell comprising at least two p-type pass gates. The SRAM also includes a first data line connected to the memory cell, a second data line connected to the memory cell and a voltage control unit connected to the first data line, wherein the voltage control unit is configured to control the memory cell.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.