Edge seals for semiconductor packages
US10431614B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 1, 2017 |
| Grant date | Oct 1, 2019 |
| Priority date | — |
| Expiry date | Feb 1, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/08145
Abstract
Implementations of semiconductor packages may include: a digital signal processor having a first side and a second side and an image sensor array, having a first side and a second side. The first side of the image sensor array may be coupled to the second side of the digital signal processor through a plurality of hybrid bond interconnect (HBI) bond pads and an edge seal. One or more openings may extend from the second side of the image sensor array into the second side of the digital signal processor to an etch stop layer in the second side of the digital signal processor. The one or more openings may form a second edge seal between the plurality of HBI bond pads and the edge of the digital signal processor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.