Use of wrapper cells to improve signal routing in integrated circuits
US10436841B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 25, 2018 |
| Grant date | Oct 8, 2019 |
| Priority date | — |
| Expiry date | Jan 25, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/48
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for circuit design includes providing one or more wrapper cells for use with a library of standard cells in design of an IC. Each wrapper cell has geometrical dimensions matching a corresponding group of one or more of the standard cells and defines an electrical path, including at least one via, from a location of a terminal in a lower metal layer in the standard cells in the corresponding group to a location in an upper metal layer. A computerized place-and-route tool receives a layout of the IC including a wrapper cell superimposed over one of the standard cells in the corresponding group. The place-and-route tool automatically routes a signal connection through the upper metal layer and the at least one via defined by the superimposed wrapper cell to the predefined signal terminal in the lower metal layer in the one of the standard cells.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.