Methods related to a semiconductor structure with gallium arsenide and tantalum nitride
US10439051B2 · kind B2 · utility
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Key dates
| Filing date | Nov 10, 2017 |
| Grant date | Oct 8, 2019 |
| Priority date | — |
| Expiry date | Nov 10, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/126
Abstract
Disclosed are structures and methods related to metallization of a gallium arsenide (GaAs) layer. In some embodiments, a tantalum nitride (TaN) layer can be formed on a doped GaAs layer, and a metal layer can be formed on the TaN layer. Such a structure can be included in a Schottky diode. In some embodiments, such a Schottky diode can be fabricated utilizing heterojunction bipolar transistor (HBT) processes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.