Patent · US Revoked

Wafer-level package with enhanced performance

US10442684B2 · kind B2 · utility

0Cited by
86References
22Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 14, 2017
Grant dateOct 15, 2019
Priority date
Expiry dateDec 8, 2037

Classification

  • Technology area (CPC —)General

Abstract

The present disclosure relates to a wafer-level package that includes a first thinned die, a multilayer redistribution structure, a first mold compound, and a second mold compound. The first thinned die resides over a top surface of the multilayer redistribution structure. The multilayer redistribution structure includes at least one support pad that is on a bottom surface of the multilayer redistribution structure and vertically aligned with the first thinned die. The first mold compound resides over the multilayer redistribution structure and around the first thinned die, and extends beyond a top surface of the first thinned die to define an opening within the first mold compound and over the first thinned die. The second mold compound fills the opening and is in contact with the top surface of the first thinned die.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.