Leveraging control surface fast clears to optimize 3D operations
US10445923B2 · kind B2 · utility
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1References
18Claims
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Key dates
| Filing date | Sep 28, 2017 |
| Grant date | Oct 15, 2019 |
| Priority date | — |
| Expiry date | Sep 28, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T15/80
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
One embodiment provides a graphics processor comprising a hardware graphics rendering pipeline configured to perform multisample anti-aliasing, the hardware graphics rendering pipeline including pixel processing logic to determine that each sample location of a pixel of a multisample surface is associated with a clear value and resolve a color value for the pixel to a non-multisample surface via a write of metadata to indicate that the pixel has the clear value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.