Abhishek Venkatesh
53Patents
3h-index
74Co-inventors
65Inventor score
Filing activity: Sep 26, 2013 → Nov 22, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US10235735B2 | Graphics processor with tiled compute kernels | Physics | 13 | Active |
| US10109078B1 | Controlling coarse pixel size from a stencil buffer | Physics | 4 | Active |
| US10783603B2 | Graphics processor with tiled compute kernels | Physics | 3 | Active |
| US10861126B1 | Asynchronous execution mechanism | Emerging Cross-Sectional Technologies | 3 | Active |
| US10643374B2 | Positional only shading pipeline (POSH) geometry data processing with coarse Z buffer | Physics | 3 | Active |
| US11062506B2 | Tile-based immediate mode rendering with early hierarchical-z | Physics | 2 | Active |
| US10163179B2 | Method and apparatus for intelligent cloud-based graphics updates | Physics | 2 | Active |
| US10796397B2 | Facilitating dynamic runtime transformation of graphics processing commands for improved graphics performance at computing devices | Physics | 2 | Active |
| US10733690B2 | GPU mixed primitive topology type processing | Physics | 2 | Active |
| US10930060B2 | Conditional shader for graphics | Physics | 2 | Active |
| US10242494B2 | Conditional shader for graphics | Physics | 1 | Active |
| US10522113B2 | Light field displays having synergistic data formatting, re-projection, foveation, tile binning and image warping technology | Physics | 1 | Active |
| US11869119B2 | Controlling coarse pixel size from a stencil buffer | Physics | 1 | Active |
| US10964087B2 | Leveraging control surface fast clears to optimize 3D operations | Physics | 1 | Active |
| US10706591B2 | Controlling coarse pixel size from a stencil buffer | Physics | 1 | Active |
| US11257182B2 | GPU mixed primitive topology type processing | Physics | 0 | Active |
| US10867427B2 | Multi-resolution image plane rendering within an improved graphics processor microarchitecture | Physics | 0 | Active |
| US11494867B2 | Asynchronous execution mechanism | Emerging Cross-Sectional Technologies | 0 | Active |
| US11151683B2 | Use of inner coverage information by a conservative rasterization pipeline to enable EarlyZ for conservative rasterization | Physics | 0 | Active |
| US10706612B2 | Tile-based immediate mode rendering with early hierarchical-z | Physics | 0 | Active |
| US10134170B2 | Stereoscopic rendering using vertix shader instancing | Electricity | 0 | Active |
| US10937126B2 | Tile-based multiple resolution rendering of images | Physics | 0 | Active |
| US10453241B2 | Multi-resolution image plane rendering within an improved graphics processor microarchitecture | Physics | 0 | Active |
| US10573066B2 | Anti-aliasing adaptive shader with pixel tile coverage raster rule system, apparatus and method | Physics | 0 | Active |
| US10204394B2 | Multi-frame renderer | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.