Stacked semiconductor dies including inductors and associated methods
US10446527B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 11, 2018 |
| Grant date | Oct 15, 2019 |
| Priority date | — |
| Expiry date | Sep 11, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3511
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Semiconductor devices, systems including semiconductor devices, and methods of making and operating semiconductor devices. Such semiconductor devices can comprise a substrate, a first die mounted to the substrate, and a second die mounted to the first die in an offset position. The first die having first inductors at a first active side of the first die, the second inductors at a second active side of the second die, and a least one first inductor is proximate and inductively coupled to a second inductor. First interconnects electrically couple the substrate to the first die, and second interconnects electrically couple the second die to the substrate. The first interconnects extend from an upper surface of the substrate to the first active side, and the second interconnects extend from the second active side to the lower surface of the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.