Method and device for monitoring a critical path of an integrated circuit
US10451670B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 14, 2016 |
| Grant date | Oct 22, 2019 |
| Priority date | — |
| Expiry date | Sep 20, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/00369
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A device for monitoring a critical path of an integrated circuit includes a replica of the critical path formed by sequential elements mutually separated by delay circuits that are programmable though a corresponding main multiplexer. A control circuit controls delay selections made by each main multiplexer. A sequencing module operates to sequence each sequential element using a main clock signal by delivering, in response to a main clock signal, respectively to the sequential elements, secondary clock signals that are mutually time shifted in such a manner as to take into account the propagation time inherent to the main multiplexer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.