Sylvain Clerc
20Patents
4h-index
19Co-inventors
56Inventor score
Filing activity: Jun 23, 2005 → Sep 24, 2020
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8339172B2 | Flip-flop with single clock phase and with reduced dynamic power | Electricity | 6 | Active |
| US9479168B2 | Method for controlling an integrated circuit | Electricity | 5 | Active |
| US7321506B2 | Multivibrator protected against current or voltage spikes | Electricity | 4 | Expired |
| US9000840B2 | Integrated circuit comprising a clock tree cell | Electricity | 4 | Active |
| US8837206B2 | Memory device | Physics | 2 | Active |
| US8497701B2 | Integrated circuit elementary cell with a low sensitivity to external disturbances | Electricity | 2 | Active |
| US9748955B1 | Radiation-hardened CMOS logic device | Electricity | 2 | Active |
| US10451670B2 | Method and device for monitoring a critical path of an integrated circuit | Electricity | 1 | Active |
| US8937505B2 | Integrated circuit comprising a clock tree cell | Electricity | 1 | Active |
| US8867264B2 | SRAM read-write memory cell having ten transistors | Physics | 1 | Active |
| US8570060B2 | Method for protecting a logic circuit against external radiation and associated electronic device | Electricity | 0 | Active |
| US10684326B2 | Method and device for testing a chain of flip-flops | Physics | 0 | Active |
| US7564282B2 | Bistable flip-flop having retention circuit for storing state in inactive mode | Electricity | 0 | Expired |
| US8565030B2 | Read boost circuit for memory device | Physics | 0 | Active |
| US7876141B2 | Synchronization pulse generator with forced output | Electricity | 0 | Active |
| US9634671B2 | Device for generating a clock signal by frequency multiplication | Electricity | 0 | Active |
| US7236031B2 | Fast bistable circuit protected against random events | Electricity | 0 | Expired |
| US9417282B2 | Method for managing the operation of a circuit with triple modular redundancy and associated device | Physics | 0 | Active |
| US10048317B2 | Method and device for testing a chain of flip-flops | Physics | 0 | Active |
| US11385288B2 | Device, method and system of error detection and correction in multiple devices | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.