Post passivation interconnect and fabrication method therefor
US10453811B2 · kind B2 · utility
1Cited by
0References
20Claims
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Assignee
Inventors
Key dates
| Filing date | May 1, 2017 |
| Grant date | Oct 22, 2019 |
| Priority date | — |
| Expiry date | May 1, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3511
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacturing a semiconductor structure. The method includes depositing a conductive material over a substrate, and removing a portion of the conductive material to form a conductive structure having a barrel shape. A width of a body portion of the conductive structure is greater than a width of an upper portion and a width of a bottom portion of the conductive structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.