Non-volatile memory device application programming interface
US10459847B1 · kind B1 · utility
3Cited by
7References
42Claims
0Family size
Assignee
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Key dates
| Filing date | Jul 1, 2015 |
| Grant date | Oct 29, 2019 |
| Priority date | — |
| Expiry date | Apr 8, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7202
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method includes deploying non-volatile random access memory (NVRAM) coupled to a processor or central processing unit (CPU) core of a computing device as a peripheral device via an input/output (I/O) bus, and providing a NVRAM application programming interface (API) for the CPU core to conduct NVRAM read and write operations. Providing the NVRAM API includes allocating a single memory buffer per command to hold data transferred to or from the NVRAM. The method includes configuring the processor in conjunction with the NVRAM API to set up command queues inside in the host Memory Mapped Input Output (MMIO) space.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.