Method of forming protection layer in FinFET device
US10468309B2 · kind B2 · utility
1Cited by
1References
17Claims
0Family size
Assignee
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Key dates
| Filing date | Oct 4, 2017 |
| Grant date | Nov 5, 2019 |
| Priority date | — |
| Expiry date | Oct 4, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/693
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for forming a fin-based transistor includes forming a fin on a substrate; overlaying at least an upper portion of the fin by an oxide layer and a protection layer, wherein the protection layer is formed above the oxide layer; and doping at least the upper portion of the fin by using an ion implantation process, wherein the protection layer protects against damage to at least the upper portion of the fin and the oxide layer during the ion implantation process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.