Patent · US Active

Semiconductor device with through-substrate via and corresponding method of manufacture

US10468541B2 · kind B2 · utility

0Cited by
1References
15Claims
0Family size

Assignee

Inventors

Key dates

Filing dateDec 12, 2014
Grant dateNov 5, 2019
Priority date
Expiry dateFeb 17, 2035

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/0002
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A dielectric layer (2) is arranged on the main surface (10) of a semiconductor substrate (1), and a passivation layer (6) is arranged on the dielectric layer. A metal layer (3) is embedded in the dielectric layer above an opening (12) in the substrate, and a metallization (14) is arranged in the opening. The metallization contacts the metal layer and forms a through-substrate via to a rear surface (11) of the substrate. A layer or layer sequence (7, 8, 9) comprising at least one further layer is arranged on the passivation layer above the opening. In this way the bottom of the through-substrate via is stabilized. A plug (17) may additionally be arranged in the opening without filling the opening.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.