Built-in self test for A/D converter
US10474553B2 · kind B2 · utility
0Cited by
12References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 18, 2017 |
| Grant date | Nov 12, 2019 |
| Priority date | — |
| Expiry date | Jan 30, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/12
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Analog-to-digital conversion is tested in-field using an on-chip built-in self-test (BIST) sub-circuit formed within an underlying integrated circuit. Processing cycles may be conscripted during an idle state when the analog-to-digital conversion is not needed. The BIST requires a test time which may be compared to an idle time. If the idle time exceeds the test time, then the BIST may be entirely performed. However, if the idle time is unknown or less than the test time, the BIST may be paused and resumed between subsequent idle states.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.