Patent · US Active

Semiconductor structure and method for forming the same

US10475708B2 · kind B2 · utility

0Cited by
1References
10Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMar 12, 2019
Grant dateNov 12, 2019
Priority date—
Expiry dateMar 12, 2039

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D64/661
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A semiconductor structure includes a substrate and a CMOS structure. The CMOS structure includes a PMOS structure and a NMOS structure. The PMOS structure includes two first source/drain regions disposed in the substrate, a first gate dielectric disposed partially in the substrate between the first source/drain regions, and a fully silicided gate electrode disposed on the first gate dielectric. The NMOS structure includes two second source/drain regions disposed in the substrate, a second gate dielectric disposed partially in the substrate between the second source/drain regions, and a non-silicided conductive gate electrode disposed on the second gate dielectric.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.