Programmable protocol independent bar memory for SSD controller
US10482038B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 25, 2016 |
| Grant date | Nov 19, 2019 |
| Priority date | — |
| Expiry date | Feb 12, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/1052
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Memory systems may include a programmable bit control unit suitable for defining read-write properties to locations in a base address register (BAR) memory, a read-write switch suitable for receiving a memory access request, and identifying whether the memory access request is a read access or a write access, and an access control unit suitable for receiving the memory access request from the read-write switch when the memory access request is identified as a write access, determining a read-write property associated with the write access, and processing the write access to a location in the BAR memory with a defined read-write property that is the same as the determined read-write property associated with the write request.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.