Voltage reference computations for memory decision feedback equalizers
US10482932B2 · kind B2 · utility
2Cited by
3References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 29, 2018 |
| Grant date | Nov 19, 2019 |
| Priority date | — |
| Expiry date | Nov 29, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/107
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A device includes a combinational circuit configured to create a one or more distortion correction factors used offset inter-symbol interference from a data stream on a distorted bit. The device also includes a selection circuit coupled to the combinational circuit. The selection circuit includes a feedback pin configured to receive a control signal and an output, wherein the selection circuit is configured to select a first distortion correction factor of the one or more distortion correction factors based upon the control signal and transmit the first distortion correction factor from the output.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.