Semiconductor device
US10483207B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 3, 2017 |
| Grant date | Nov 19, 2019 |
| Priority date | — |
| Expiry date | Aug 3, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/50
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
According to one embodiment, the insulating layer is provided on the terrace portions. The plurality of contact portions extend through the insulating layer in the stacking direction and contact the terrace portions. The second columnar portion extends through the insulating layer and through the second stacked portion in the stacking direction, and includes a second semiconductor body contacting the first semiconductor region. The first insulating portion divides the first semiconductor region in the first direction. The first insulating portion is provided under a boundary portion between the first stacked portion and the second stacked portion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.