Isolation structure for reducing crosstalk between pixels and fabrication method thereof
US10483310B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 3, 2017 |
| Grant date | Nov 19, 2019 |
| Priority date | — |
| Expiry date | Mar 3, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F39/8063
Abstract
An isolation structure and a method for fabricating the same are provided. The isolation structure includes a reflective layer, a first dielectric layer and a second dielectric layer. A dielectric constant of the first dielectric layer is different from that of the second dielectric layer. In the method for fabricating the isolation structure, at first, a semiconductor substrate is provided. Then, a first reflective layer is formed on the semiconductor substrate. Thereafter, the first dielectric layer is formed on the reflective layer. Thereafter, the second dielectric layer is on the first dielectric layer. Then, the first reflective layer, the first dielectric layer and the second dielectric layer are etched to form a grid structure. Thereafter, a passivation layer is formed to cover the etched first reflective layer, the etched first dielectric layer and the etched second dielectric layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.