Circuit for and method of receiving a signal in an integrated circuit device
US10484167B2 · kind B2 · utility
4Cited by
17References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 13, 2018 |
| Grant date | Nov 19, 2019 |
| Priority date | — |
| Expiry date | Mar 13, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/20
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A circuit for receiving a signal in an integrated circuit is described. The circuit comprises a sampler configured to receive an input data signal, wherein the sampler generates sampled data and a recovered clock; a clock and data recovery circuit configured to receive the sampled data and the recovered clock and to generate a phase interpolator code; and a phase interpolator configured to receive the phase interpolator code; wherein the phase interpolator generates multiple phase interpolator control signals during a clock cycle based upon the phase interpolator code generated for the clock cycle.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.