Reducing or avoiding mechanical stress in static random access memory (SRAM) strap cells

US10490558B2 · kind B2 · utility

Assignee

• QUALCOMM Incorporated · US

Inventors

• Youn Sung Choi · San Diego, US
• Samit Sengupta · San Jose, US
• Shashank S. Ekbote · San Diego, US

Key dates

• Filing date: May 31, 2017
• Grant date: Nov 26, 2019
• Expiry date: Jun 6, 2037

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/1437
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Aspects for reducing or avoiding mechanical stress in static random access memory (SRAM) strap cells are disclosed herein. An exemplary SRAM strap cell includes a P-type doped well (Pwell) tap electrically coupled to a first supply rail to distribute a first supply voltage to a Pwell region of corresponding SRAM bit cell rows. The SRAM strap cell also includes an N-type doped well (Nwell) tap electrically coupled to a second supply rail to distribute a second supply voltage to an Nwell region of corresponding SRAM bit cell rows. In one exemplary aspect, the Nwell tap can include multiple supply contacts used to couple the second supply rail to the SRAM strap cell to reduce mechanical stress in the Nwell tap. In another exemplary aspect, the Pwell tap can include non-active gates disposed across multiple Fins to stabilize the Fins and reduce or avoid mechanical stress in the Pwell tap.