High-density memory macro
US10497410B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Sep 5, 2018 |
| Grant date | Dec 3, 2019 |
| Priority date | — |
| Expiry date | Sep 5, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/412
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A high-density memory includes: a data write interface, a data read interface, an array of memory cells and level-shifting write drivers. The data write interface inputs data written to the memory. The data read interface outputs data read from the memory. The array of memory cells stores data input at the data write interface and outputs stored data to the data read interface. Each of the memory cells includes at least one low threshold voltage (LVT) read transistor and at least one respective regular threshold voltage (RVT) transistor, so as to obtain high-speed read operations. The level-shifting write drivers supply shifted write wordline voltages to the array, so as to obtain high-speed write operations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.