Element chip manufacturing method
US10497622B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 14, 2017 |
| Grant date | Dec 3, 2019 |
| Priority date | — |
| Expiry date | Jun 14, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/31138
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor chip manufacturing method includes preparing a semiconductor wafer including a front surface on which a bump is exposed, a rear surface located at a side opposite to the front surface, a plurality of element regions in each of which the bump is formed, and a dividing region defining each of the element regions, forming a mask which covers the bump and has an opening exposing the dividing region on the surface of the semiconductor wafer by spraying liquid which contains raw material of the mask along the bump by a spray coating method, and singulating the semiconductor wafer by exposing the surface of the semiconductor wafer to first plasma and etching the dividing region, which is exposed to the opening, until the rear surface is reached in a state where the bump is covered by the mask.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.