Flash memory complex with a replication interface to replicate data to another flash memory complex of a data processing system
US10503416B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 21, 2017 |
| Grant date | Dec 10, 2019 |
| Priority date | — |
| Expiry date | Jun 21, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2213/0026
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
According to one embodiment, a data processing system includes a plurality of central processing unit (CPU) subsystems, each CPU subsystem having a plurality of CPUs and a plurality of memory controllers, each memory controller corresponding to one of the CPUs, a plurality of memory complexes, each memory complex being associated with one of the CPU subsystems, wherein each memory complex comprises one or more branches, a plurality of memory leaves to store data, wherein each of the branches is coupled to one or more of the memory leaves and to provide access to the data stored in the memory leaves, and a replication interface to automatically replicate data received from one of the CPU subsystems to another one of the memory complexes, wherein the received data is to be stored in one of the memory leaves.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.