Bruce Wilford
25Patents
11h-index
30Co-inventors
75Inventor score
Filing activity: Apr 18, 1994 → Dec 17, 2018
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6687247B1 | Architecture for high speed class of service enabled linecard | Electricity | 313 | Expired |
| US5509006A | Apparatus and method for switching packets using tree memory | Electricity | 144 | Expired |
| US6314110A | Method and apparatus for distributed bandwidth allocation for a bi-directional ring media with spatial and local reuse | Electricity | 86 | Expired |
| US6212183A | Multiple parallel packet routing lookup | Electricity | 68 | Expired |
| US6567404B1 | Multiprotocol packet recognition and switching | Electricity | 67 | Expired |
| US6111877A | Load sharing across flows | Electricity | 45 | Expired |
| US6157641A | Multiprotocol packet recognition and switching | Electricity | 41 | Expired |
| US6757791B1 | Method and apparatus for reordering packet data units in storage queues for reading and writing memory | Electricity | 30 | Expired |
| US7558270B1 | Architecture for high speed class of service enabled linecard | Electricity | 24 | Expired |
| US6512766B2 | Enhanced internet packet routing lookup | Electricity | 16 | Expired |
| US6603765B1 | Load sharing across flows | Electricity | 14 | Expired |
| US10209904B2 | Multiprocessor system with independent direct access to bulk solid state memory resources | Physics | 9 | Active |
| US11010054B1 | Exabyte-scale data processing system | Physics | 8 | Active |
| US6968392B1 | Method and apparatus providing improved statistics collection for high bandwidth interfaces supporting multiple connections | Electricity | 6 | Expired |
| US6990099B1 | Multiple parallel packet routing lookup | Electricity | 5 | Expired |
| US10503416B1 | Flash memory complex with a replication interface to replicate data to another flash memory complex of a data processing system | Physics | 5 | Active |
| US10515014B1 | Non-uniform memory access (NUMA) mechanism for accessing memory with cache coherence | Physics | 2 | Active |
| US11340794B2 | Multiprocessor system with independent direct access to bulk solid state memory resources | Physics | 1 | Active |
| US9519615B2 | Multiprocessor system with independent direct access to bulk solid state memory resources | Physics | 1 | Active |
| US7031323B2 | Method and apparatus for distributed bandwidth allocation for a bi-directional ring media with spatial and local reuse | Electricity | 1 | Expired |
| US10713334B1 | Data processing system with a scalable architecture over ethernet | Physics | 1 | Active |
| US8902902B2 | Recursive lookup with a hardware trie structure that has no sequential logic elements | Emerging Cross-Sectional Technologies | 0 | Active |
| US10410693B2 | Multiprocessor system with independent direct access to bulk solid state memory resources | Physics | 0 | Active |
| US9899996B1 | Recursive lookup with a hardware trie structure that has no sequential logic elements | Emerging Cross-Sectional Technologies | 0 | Active |
| US10496284B1 | Software-implemented flash translation layer policies in a data processing system | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.