Method for patterning a lanthanum containing layer
US10504795B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 27, 2018 |
| Grant date | Dec 10, 2019 |
| Priority date | — |
| Expiry date | Mar 27, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/3115
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Embodiments described herein relate to a method for patterning a doping layer, such as a lanthanum containing layer, used to dope a high-k dielectric layer in a gate stack of a FinFET device for threshold voltage tuning. A blocking layer may be formed between the doping layer and a hard mask layer used to pattern the doping layer. In an embodiment, the blocking layer may include or be aluminum oxide (AlOx). The blocking layer can prevent elements from the hard mask layer from diffusing into the doping layer, and thus, can improve reliability of the devices formed. The blocking layer can also improve a patterning process by reducing patterning induced defects.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.