Substrate processing method and device manufactured using the same
US10504901B2 · kind B2 · utility
10Cited by
118References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 12, 2018 |
| Grant date | Dec 10, 2019 |
| Priority date | — |
| Expiry date | Apr 12, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/50
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A substrate processing method includes stacking a plurality of stack structures each including an insulating layer and a sacrificial layer, on one another. The method also includes generating a stair structure by etching the stack structures and generating a separation layer on a side surface of the stair structure. The method further includes removing the sacrificial layer and generating conductive word line structures in spaces from which the sacrificial layer is removed. The separation layer is provided between the conductive word line structures.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.