Low standby power with fast turn on method for non-volatile memory devices
US10510387B2 · kind B2 · utility
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11References
8Claims
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Key dates
| Filing date | Aug 6, 2018 |
| Grant date | Dec 17, 2019 |
| Priority date | — |
| Expiry date | Aug 6, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/32
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for driving a non-volatile memory system is disclosed. A standby detection circuit detects whether the nonvolatile memory system is in a standby condition. In response to determining that the non-volatile memory system is in a standby condition, a bias control circuit reduces bias currents provided to drivers of the non-volatile memory system in a standby mode. The non-volatile memory system is operated in the standby mode after the bias currents have been reduced, where an output signal indicating the standby mode is maintained until a read instruction is detected.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.